IEEE Kansai Section第10回技術講演会
IEEE Kansai Section第10回技術講演会
記
技術講演会概要
講演会テーマ(Title)
Algorithmic Complexity, Motion Estimation and a VLSI Architecture for MPEG-4 Core Profile Video Codecs
講演者(Lecturers)
Dr. Walter Stechele
(Director of Research at the Institute for Integrated Circuits at the Technical University of Munich)
日時(Time & Date)
2001年4月16日（月）15:00～17:00
場所(Place)
〒565-0871 大阪府吹田市山田丘２－１
大阪大学工学部電気系棟Ｅ６－１１２
E6-112 School of Engineering, Osaka University
会場地図（下記ホームページを参照)
*アクセス:
http://www.osaka-u.ac.jp/ja/access/
*キャンパスマップ：
http://www.osaka-u.ac.jp/ja/access/suita.html
**Access :
http://www.osaka-u.ac.jp/en/access/index.html
**Campus map:
http://www.osaka-u.ac.jp/en/access/suita.html
講演内容（Abstract)
VLSI architecture with flexible, application-specific coprocessors for object based video encoding/decoding is presented. This architecture combines high performance of dedicated ASIC architectures with the flexibility of programmable processors. Dataflow and memory access were optimized based on extensive studies of statistical complexity variations.
The architecture consists of a standard embedded core, as well as coprocessor modules for macroblock algorithms, motion estimation and bitstream processing. Results on silicon area and clock rate, required for realtime processing of MPEG-4 Core Profile video, are presented, as well as a comparison with software implementations on a standard RISC architecture.
講演者略歴(Biography)
He received the Dipl.-Ing. and Dr.-Ing. degrees in electrical engineering from the Technical University of Munich, Germany, in 1983 and 1988, respectively. In 1990 he joined Kontron Elektronik GmbH, a German electronic company, where he was responsible for the ASIC and PCB design departement. Since 1993 he has been Director of Research at the Institute for Integrated Circuits at the Technical University of Munich. His interests include digital video signal processing and VLSI design, with focus on system-on-chip design methodology and low power implementation for mobile multimedia.
参加費 (Fee)
無料 (Free）
参加申込み先 (Contact for registration)
619-288 京都府相楽郡精華町光台2-2
ATRメディア情報科学研究所 本庄由美子
Yumiko Honjo (ATR MIS Labs.)
Tel: (0774) 95 1404
Fax: (0774) 95 1408
E-mail: honjo@atr.co.jp
会場準備の都合上、参加ご希望の方は、IEEE会員番号、 所属およびお名前（ふりがな）を上記参加申し込み先まで Email（Faxでも結構です）にて4月13日（金）までにお知らせください。
Please register in advance. E-mail or fax IEEE member ID, your name and affiliation by April 13 (Fri).
本件連絡先 (For further information)
白川 功 （大阪大学工学部）
E-mail: sirakawa@ise.eng.osaka-u.ac.jp
