IEEE SSCS Kansai Chapterでは、下記の日程で技術セミナーを開催致しました。
今回は2014 IEEE Symposium on VLSI Circuits報告会でした。
2014年6月のVLSI Symposiumで発表された注目論文を、10名の方にご講演いただきました。
日時 |
2014年7月14日(月)9:55より16:25 | |
会場 |
大阪・常翔学園大阪センター:
301講義室 所在地:大阪市北区梅田3-4-5 毎日インテシオ3F Access Map | |
主催 |
IEEE Solid-State Circuits Society Kansai Chapter | |
共催 |
IEEE Solid-State Circuits Society Japan Chapter | |
講演 |
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9:55-10:00 |
Opening | |
10:00-10:30 |
16.4 "A Local EM-Analysis Attack Resistant Cryptographic Engine with Fully-Digital Oscillator-Based Tamper- Access Sensor" N. Miura, D. Fujimoto, D. Tanaka, Y.-i. Hayashi, N. Homma, T. Aoki and M. Nagata ご発表者:三浦様 |
|
10:30-11:00 |
2.1 "A 36 Gbps 16.9 mW/Gbps Transceiver in 20-nm CMOS with 1-tap DFE and Quarter-Rate Clock Distribution" T. Hashida, Y. Tomita, Y. Ogata, K. Suzuki, S. Suzuki, T. Nakao, Y. Terao, S. Honda, S. Sakabayashi, R. Nishiyama, A. Konmoto, Y. Ozeki, H. Adachi, H. Yamaguchi, Y. Koyanagi and H. Tamura ご発表者:尾形様 | |
11:00-11:30 |
12.4 "Application-Aware Solid-State Drives (SSDs) with Adaptive Coding" S. Tanakamaru, Y. Kitamura, S. Yamazaki, T. Tokutomi and K. Takeuchi ご発表者:竹内様 |
|
11:30-12:00 |
5.4 "7-bit 0.8-1.2GS/s Dynamic Architecture and Frequency Scaling Subrange ADC with Binary-Search/Flash Live Configuring Technique" K. Yoshioka, R. Saito, T. Danjo, S. Tsukamoto and H. Ishikuro ご発表者:吉岡様 |
|
12:00-13:00 | Lunch | |
13:00-13:30 |
7.3 "An Ultra-Low-Power 2-step Wake-Up Receiver for IEEE 802.15.4g Wireless Sensor Networks" T. Abe, T. Morie, K. Satou, D. Nomasaki, S. Nakamura, Y. Horiuchi and K. Imamura ご発表者:阿部様 |
|
13:30-14:00 |
11.2 "A 56-Gb/s Receiver Front-End with a CTLE and 1-Tap DFE in 20-nm CMOS" T. Shibasaki, W. Chaivipas, Y. Chen, Y. Doi, T. Hamada, H. Takauchi, T. Mori, Y. Koyanagi and H. Tamura ご発表者:柴崎様 |
|
14:00-14:30 |
14.1 "A 512-kb 1-GHz 28-nm Partially Write-Assisted Dual-Port SRAM with Self-Adjustable Negative Bias Bitline" S. Tanaka, Y. Ishii, M. Yabuuchi, T. Sano, K. Tanaka, Y. Tsukamoto, K. Nii and H. Sato ご発表者:新居様 |
|
14:30-15:00 |
15.1 " A PVT-Variation Tolerant Fully Integrated 60 GHz Transceiver for IEEE 802.11ad" T. Tsukizawa, A. Yoshimoto, H. Komori, K. Miyanaga, R. Kitamura, Y. Morishita, M. Irie, Y. Nagaso, T. Watanabe, K. Takinami and N. Saito ご発表者:築澤様 | |
15:00-15:20 |
Break |
|
15:20-15:50 |
22.4 "92% Start-up Time Reduction by Variation-Tolerant Chirp Injection (CI) and Negative Resistance Booster (NRB) in 39MHz Crystal Oscillator" S. Iguchi, H. Fuketa, T. Sakurai and M. Takamiya ご発表者:井口様 | |
15:50-16:20 |
22.5 "A 2.9mW, ± 85ppm Accuracy Reference Clock Generator Based on RC Oscillator with On-chip Temperature Calibration" Y. Satoh, H. Kobayashi, T. Miyaba and S. Kousai ご発表者:佐藤様 | |
16:20-16:25 |
Closing |
|
参加者 |
48名(IEEE Member:17名、Non-Member:21名) | |
講演者と役員 |